Memory safety is a property of computer systems that ensures programs only access memory locations they are permitted to,
preventing unintended or malicious behaviour.

What is Memory Safety?

Security

Majority of critical software vulnerabilities stem from memory safety violations.

Reliability

Memory errors often lead to program crashes or unpredictable behaviour.

Maintainability

Ensure memory safety makes debugging easier & reduces technical debt.

Compliance

Many industries require memory-safe programming to meet regulatory standards.

Traditional Memory Safety Challenges

Unpredictability

Memory safety bugs let one part of a program modify a completely unrelated part of the program's state. Exact effects of this depend on what the program has done, will do, or is doing. They may be unexploitable in one version, but an unrelated change may allow an attacker to gain arbitrary-code execution privileges in the next.

Buffer Overflow

Writing past the allocated memory bounds may leak secrets, such as Heartbleed

Use-After-Free/Dangling Pointers

Using a pointer after its memory has been deallocated leads to crashes, leaks or arbitrary code execution privileges.

Uninitialized Memory Access

Using memory before setting a valid value will likely cause undefined behaviour.

How is Memory Safety Achieved?

Memory safety has been attempted in several ways, including:

Formal Methods
Tightly defined specifications and interfaces and rigorous testing is the most traditional approach to Memory Safety, but the costs are often too high, and code reuse too low to make this acceptable in most application development.

Automatic Memory Management
Garbage-collected languages like Java, Python, and C# automatically manage memory allocation and deallocation, reducing the risk of memory-related bugs.

Safe Programming Languages
Languages like Rust and Swift have built-in memory safety features that attempt to prevent developers from making common memory management errors.

Static Analysis and Runtime Checks
These tools analyse code for potential memory safety violations, ensuring that unsafe memory operations are detected before or during execution.

CHERI Architecture
CHERI (Capability Hardware Enhanced RISC Instructions) extends existing hardware to provide fine-grained memory protection at the instruction level. CHERI-based processors like those being developed at SCI Semiconductor offer hardware-enforced memory safety by using capabilities that track the boundaries and permissions of every memory reference.

How is SCI Semiconductor
Bringing Memory Safety to Hardware?

" At SCI Semiconductor, we are at the forefront of bringing hardware-enforced memory safety to critical industries. Our microcontrollers and processors, designed with CHERI-based technology, offer unprecedented levels of security and reliability by eliminating the most common types of memory vulnerabilities.

We are collaborating with industry leaders like Microsoft and Google, as well as the UK and US governments, to drive this cutting-edge technology to market. Our products, launching in 2025, will provide a new standard in secure computing for critical infrastructure, defence, automotive, and medical. "

Haydn Povey, CEO

Real-World Examples of Memory Safety

Industrial Automation

Secure and manage software risks across cyber physical systems. Integrating Memory Safe technologies, utilizing the ICENI™ platform, instantly reduces threats from misconfiguration and software supply chain.

Considered the #1 risk by many IACS vendors the impact of Memory Safe technology will reduce vulnerabilities, reduce customer challenges and ensure system security over extended lifetimes.

Supporting Standards

Meeting emerging aggressive regulations and standards including IEC 62443-4 is both challenging and expensive. CHERIoT / CHERI technology substantially reduces the effort whilst increasing availability and integrity.

Critial Infrustructure

Water processing, energy generation & transmission, public transportation systems, and many other systems are often described as the soft underbelly of a nation's defense. The critical systems that enable us to go about our everyday lives are often invisible, but fundamental to supporting a healthy economy.

As we continue to transition to digital control and communications, we become ever more reliant on a bedrock of aging digital control systems, that often host a range of Memory Safe issues, waiting for exploitation.

It is impractical, and too expensive, to remove legacy systems, but by transitioning to ICENI™ with pin compatible devices, a simple code recompile may just save your industry millions by removing attack vectors and securing control and communications.

The automotive industry is defined by robust systems, often having undergone years of safety testing. However, as is true of any connected system, the automotive platforms are not immune to Memory Safe failures, creating significant attack surfaces that have been shown to impact powertrain and braking systems. The advent of regular OTA updates is an additional challenge: while these enable rapid deployment of updates and patches, they also enable bad actors to impact the system

Safety & Security

Safety and security are two sides of the same coin, with security being critical to managing safety, and vice versa. However, driver safety remains paramount. The ICENI™ platform is defined to capture security failures without impacting safety, providing auditing, fine-grained control and limiting blast radius of attack vectors.

Automotive Systems

V2V / V2X

Vehicle to vehicle (V2V), vehicle to infrastructure (V2X), and autonomous vehicles are all critical domains where humans are surrendering control to automated systems, and hence a major challenge for security and safety. The need to ensure platforms remain secure from attack over their entire lifetimes of 20 years, or more, create major technology headaches, and has led to the removal of several platforms from the market.

The CHERI technology underpinning the ICENI™ devices provides both Memory Safety & fine-grained compartmentalization, enabling systems to rapidly reuse code without having to surrender critical safety metrics, ensuring that even if a flaw is identified in the code base, exploits cannot be easily transformed into remote attacks.

Aerospace

Aerospace and defence applications have driven high integrity and high availability systems for many years, with high grade mission critical systems. The need for “right first time, every time” has, in turn driven improvements in memory safety and system definition, primarily through formal methods, and the definition of high integrity languages, such as Fortran, Cobol, and Ada. The challenge is these languages are specialist and often limited in use, reducing the engineering talent pool vs traditional C/C++, creating a significant technical gap. Similarly, the challenges of formal methods, with a focus on crafting complex specifications and engineering to these, leads to a far higher cost base, normally 30x vs traditional methods, and prolonged time to market. CHERI technology resolves these challenges enabling high integrity programs written in C, within nominal timescales.

Medical Applications

Medical applications often require the highest level of safety and security, especially implantation devices which may need to be in place for 20 years or more. As medical science progresses, so does the need to transition from older "formal methods” type development, with high costs and many years to market, to a more flexible, faster and ultimately cheaper methodology, while maintaining a strong focus on safety, security, and compliance.

The requirements of standards such as the IEC62304 medical device software standard, covering planning and detailed design, implementation and verification, are well suited to the ICENI™ and CHERIoT memory safe programming flow, with strong isolation between compartments while providing safe sharing of data, enabling more modular and robust, high availability applications.

ICENI™ CHERIoT RISC-V

Based on integrated CHERIoT foundations, SCI ICENI™ devices turn memory-safe security into a strategic advantage—creating value for developers, integrators, and end users alike.